The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2002
Filed:
Mar. 18, 1999
Jason M. Brown, Stafford, TX (US);
Steven C. Eplett, Houston, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A clock buffer circuit ( ) for generating buffered clock signals (CLKI and CLKI_) in response to an external clock signal (CLKX) is disclosed. A first buffer section ( ) drives to a first output node ( ) between high and low logic levels in reponse the CLKX signal. To reverse the adverse effects of noise on the falling edges of CLKX signal, a boost section ( ) and clock generator ( ) are provided. In response to low-to-high transitions at the first output node ( ) the pulse generator ( ) generates a pulse at a pulse output ( ). In response to the pulse, the boost section ( ) provides additional driving capability for further pulling the first output node ( ) to the high logic level. The first output node provides the CLKI_ signal. A second buffer circuit ( ) provides the CLKI signal in response to the CLKI_ signal. An enabling section ( ) is provided for enabling, or alternatively, disabling the preferred embodiment ( ). In addition, a hysteresis section ( ) is also included to introduce hysteresis into the response of the preferred embodiment ( ).