Latch sense amplifier circuit with an improved next stage buffer

Abstract

The present invention provides a next stage buffer receiving a pair of complementary signals from a flip-flop in a latch sense amplifier circuit, wherein the next stage buffer comprises: a plurality of logic gates of the same type, each of which individually includes a series connection of at least an individual first conductivity type field effect transistor individually provided to the plurality of logic gates and a common first conductivity type field effect transistor commonly provided to the plurality of logic gates, and the common first conductivity type field effect transistor is connected to a carrier supply line which supplies carriers to the common first conductivity type field effect transistor, so that the plurality of logic gates have a common node between the first conductivity type field effect transistors and the common first conductivity type field effect transistor.