The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2002
Filed:
Dec. 13, 2000
Applicant:
Inventor:
Nitin Juneja, Fremont, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/148 ; H01L 2/150 ;
Abstract
A method of making a ball grid array package includes the steps of (a) laying out an even I/O pad row and an odd I/O pad row of m I/O pads each for a ball grid array package wherein m is a positive integer, (b) laying out an even via row of m+1 vias directly below each odd I/O pad row, and (c) laying out an odd via row of m−1 vias directly below each even I/O pad row. A ball grid array package includes an even I/O pad row and an odd I/O pad row of m I/O pads each wherein m is a positive integer, an even via row of m+1 vias directly below each odd I/O pad row, and an odd via row of m−1 vias directly below each even I/O pad row.