The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

May. 26, 2000
Applicant:
Inventors:

John B. Gehman, Trophy Club, TX (US);

Kerry Lucille Johns-Vano, Scottsdale, AZ (US);

Colleen Kane Steward, Mesa, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A process ( ) and design tool ( ) are presented for the accurate prediction of design parameters ( ) for components ( ) of an integrated circuit ( ) during the early stages of the design of that integrated circuit ( ). These predicted design parameters ( ) include pin count parameters ( ), propagation delay parameters ( ), layout area parameters ( ), dynamic power parameters ( ), static power parameters ( ), and total power parameters ( ). With these parameters, the designer interactively modifies the design prior to the layout and prototyping of the integrated circuit ( ). The dynamic power parameters ( ) and total power parameters ( ) may be repetitively predicted with differing input items to establish a power usage pattern for the integrated circuit ( ).


Find Patent Forward Citations

Gehman, John. (2002). Electronic device parameter estimator and method therefor (U.S. Patent No. 6405349). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6405349

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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