The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Apr. 14, 1999
Applicant:
Inventors:

Hiroshi Ohsuga, Hino, JP;

Atsushi Kiuchi, Kokubunji, JP;

Hironobu Hasegawa, Kodaira, JP;

Toru Baji, Inagi, JP;

Koki Noguchi, Tokyo, JP;

Yasushi Akao, Kokubunji, JP;

Shiro Baba, Kokubunji, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/340 ; G06F 1/342 ; G06F 1/320 ; G06F 9/26 ;
U.S. Cl.
CPC ...
G06F 1/340 ; G06F 1/342 ; G06F 1/320 ; G06F 9/26 ;
Abstract

A built-in memory is divided into the following two types: first memories and and second memories and , and made accessible in parallel by third buses XAB and XDB and second buses YAB and YDB respectively. Thereby, a CPU core can simultaneously transfer two data values from the built-in memory to a DSP engine . Moreover, the third buses XAB and XDB and the second buses YAB and YDB are also separate from first buses IAB and IDB to be externally interfaced and the CPU core can access an external memory in parallel with the access to the second memories and and the first memories and


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