The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Sep. 08, 1999
Applicant:
Inventor:

Dao-Long Chen, Fort Collins, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ; H04L 1/228 ;
U.S. Cl.
CPC ...
G06F 1/300 ; H04L 1/228 ;
Abstract

A method of altering topology of a serial bus having a plurality of nodes interconnected in a tree topology in order to increase data rates between the plurality of nodes includes the step of obtaining a current topology representation of the serial bus which indicates a first node of the plurality of nodes is coupled to a second node of the plurality of nodes via a third node of the plurality of nodes. Another step of the method includes obtaining data rate capabilities of each node of the serial bus. The method further includes determining based upon the current topology representation of the serial bus and the data rate capabilities of each node that the third node of supports a third maximum data rate that is slower than a first maximum data rate supported by the first node and a second maximum data rate supported by the second node. Furthermore, the method includes generating in response to the determining step a new topology representation for the serial bus in which the third node is not coupled between the first node and the second node.


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