Circuit for reduction and optimization of write-to-read settling times in magnetic medium storage devices

Abstract

A preamplifier integrated circuit for a magnetic storage device includes read channel and a write channel. The read channel includes a filter in a forward signal path which has a low corner frequency (LCF) which varies in a time dependent manner related to the duration of a write-to-read disturbance induced by a transition from a write mode to a read mode. The LCF of the filter moves from a relatively high initial frequency to a lower steady state frequency to effectively reduce the settling time of the write-to-read disturbance without causing read errors which may arise from overfiltering in the steady state. Favorably, the filter in the forward signal path is formed by a unity gain differential emitter-follower in the forward path and a low pass filter (LPF) in a feedback path around the differential emitter-follower, the pole of the LPF being moved to achieved the movement of the LCF in the forward path. In the steady-state read mode, the filter arrangement also significant reduces DC offset in the read channel.