The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Jan. 13, 2000
Applicant:
Inventor:

Jay Ackerman, Greeley, CO (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 1/900 ;
U.S. Cl.
CPC ...
G01R 1/900 ;
Abstract

A current-mode peak detector circuit is disclosed. The current-mode peak detector circuit includes an input transistor for receiving an input current that impresses a voltage on a control node, a pair of transistors for providing an output current in response to the voltage at the control node, and a decay control circuit for controlling the decay of the voltage at the control node such that the output current is representative of a peak value of the input current signal. A clamp circuit may be provided for clamping the input voltage to a predetermined level. All of the elements of the current-mode peak detector circuit may be realized using transistors for facilitating integration of the current-mode peak detector circuit on an integrated circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other researcher to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.


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