The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Jul. 28, 1999
Applicant:
Inventors:

Larry D. McMillan, Colorado Springs, CO (US);

Carlos A. Paz de Araujo, Colorado Springs, CO (US);

Koji Arita, Colorado Springs, CO (US);

Masamichi Azuma, Shiga, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/7108 ; H01L 2/900 ;
U.S. Cl.
CPC ...
H01L 2/7108 ; H01L 2/900 ;
Abstract

An integrated circuit capacitor containing a thin film delectric metal oxide is formed above a silicon germanium substrate. A silicon nitride diffusion barrier layer is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400° C., and annealed at between 600° C. and 850° C. to form a BST capacitor dielectric. A top electrode is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.


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