The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Nov. 15, 1999
Applicant:
Inventor:

Takayuki Suyama, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract

A multichip module of the present invention includes a substrate having an upper surface, a hole provided on the upper surface of the substrate and a chip provided in the hole. The upper surface of the chip and the upper surface of the substrate forms an even, or substantially even, surface. A first insulating layer is formed on the upper surface of the chip and the upper surface of the substrate and a first wiring layer is formed on the first dielectric layer. A method for manufacturing a multichip module, which includes a substrate having a cavity provided thereon, and a chip, includes providing the chip in the cavity so that the upper surface of the chip and the upper surface of the substrate becomes even, or substantially even. The method also includes forming a first insulating layer on the upper surface of the chip and the upper surface of the substrate, and forming a first wiring layer on the first insulating layer.


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