The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 11, 2002

Filed:

Mar. 16, 2000
Applicant:
Inventors:

Andreas H. Montree, Eindhoven, NL;

Jurriaan Schmitz, Eindhoven, NL;

Pierre H. Woerlee, Eindhoven, NL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ;
U.S. Cl.
CPC ...
H01L 2/1336 ;
Abstract

In a method of manufacturing a semiconductor device comprising a transistor having a gate insulated from a channel region at a surface of a semiconductor body by a gate dielectric, an active region of a first conductivity type is defined at the surface of the semiconductor body , and a patterned layer is applied consisting of refractory material, which patterned layer defines the area of the planned gate to be provided at a later stage of the process and acts as a mask during the formation of a source zone and a drain zone of a second conductivity type in the semiconductor body In a next step, a dielectric layer is provided in a thickness which is sufficiently large to cover the patterned layer, which dielectric layer is removed over part of its thickness by means of a material removing treatment until the patterned layer is exposed, which patterned layer is removed, thereby forming a recess in the dielectric layer at the area of the planned gate. Then, impurities are introduced via the recess into the channel region of the semiconductor body in a self-registered way by using the dielectric layer , as a mask and an insulating layer is applied, forming the gate dielectric, on which insulating layer a conductive layer is applied thereby filling the recess, which conductive layer is shaped into the gate of the transistor.


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