Method of selectively forming a silicide layer on a logic area of a semiconductor substrate

Abstract

The present invention provides a method of selectively forming a silicide layer on a logic region of a semiconductor substrate which has an integration of a memory cell region and the logic region. The method comprises the steps of: forming an insulation film over the memory cell region and the logic region; entirely applying a resist film over the insulation film; selectively removing the resist film over at least a predetermined part of the logic region by use of a lithography process, whereby the insulation film is shown over the logic region; selectively etching the insulation film over the logic region by use of the resist film, whereby at least a silicon region is shown over the logic region; removing the resist film; entirely depositing a refractory metal layer on the insulation film over the memory cell region and also on the silicon region over the logic region; carrying out a heat treatment to cause a silicidation reaction to form at least a silicide layer on the silicon region over the logic region; and removing an unreacted refractory metal layer from the silicon oxide film.