The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2002
Filed:
Sep. 27, 1999
Hitachi, Ltd., Tokyo, JP;
Abstract
In a wiring condition processing method for a semiconductor integrated circuit layout information, which determines the layout of devices on the semiconductor circuit, is created based on logic information describing a connection relationship among the devices on the semiconductor. Next, a virtual wiring path is determined from the layout information. Based on the virtual wiring path, a wiring delay value is calculated. If the wiring delay value exceeds a predetermined reference value, one or more of information on the usage ratio of a wide wiring line, information on the usage ratio of a wiring layer with a small wiring load capacity, information on the usage ratio of a parallel wiring line, and information on the usage ratio of a wiring material are added to the information on the virtual wiring path to create wiring condition information.