The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Dec. 07, 2000
Applicant:
Inventors:

Robert Alan Fleming, Nikasio, CA (US);

Cherie Elaine Kushner, Nikasio, CA (US);

Assignee:

Aether Wire & Location, Inc., Nicasio, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 ;
U.S. Cl.
CPC ...
H03K 3/00 ;
Abstract

A network of localizers determines relative locations in three-dimensional space to within 1 cm by measuring propagation times of pseudorandom sequences of electromagnetic impulses. The propagation time is determined from a correlator which provides an analog pseudo-autocorrelation function sampled at discrete time bins. The correlator has a number of integrators, each integrator providing a signal proportional to the time integral of the product of the expected pulse sequence delayed by one of the discrete time bins, and the non-delayed received antenna signal. Using pattern recognition the arrival time of the received signal can be determined to within a time much smaller than the separation between bins. Because operation of standard CMOS circuitry generates noise over a large frequency range, only low-noise circuitry operates during transmission and reception. A stage in the low-frequency clock uses low-noise circuitry during transmissions and receptions, and standard circuitry at other times.


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