The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Jul. 14, 2000
Applicant:
Inventors:

Hiroya Ueno, Osaka, JP;

Junji Nakatsuka, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A control unit includes sample-and-hold circuits, their associated switching circuits and a switch controller. Each of the sample-and-hold circuits includes a switch. The switch controller sequentially outputs switch control signals one after another to the sample-and-hold circuits. For example, at a point in time data has been sampled and held in a first one of the sample-and-hold circuits, a first one of the switching circuits outputs a CLOSED signal to a second one of the switching circuits via a signal line. The second switching circuit does not output the switch control signal, received from the switch controller, to a second one of the sample-and-hold circuits until the second switching circuit receives the CLOSED signal from the first switching circuit. Accordingly, while one of the sample-and-hold circuits is sampling and holding the data, none of the other sample-and-hold circuits is allowed to open its switch. As a result, each sample-and-hold circuit can sample and hold the data accurately without being affected by the switching noise caused by the switching of any other sample-and-hold circuit.


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