Method and apparatus for generating and distributing a clock signal

Abstract

One embodiment of the present invention provides a system that generates a clock signal within an integrated circuit. This system includes four clocking elements organized into a ring, wherein each clocking element includes at least one input and at least one output, and wherein a signal at an input is complemented at a corresponding output. These clocking elements are spatially distributed throughout the integrated circuit, so that each clocking element provides the clock signal to a different region of the integrated circuit. These clocking elements are also coupled together though a plurality of interconnections, so that each output of each clocking element is coupled to at least one input of a neighboring clocking element. Furthermore, a given signal is inverted an odd number of times in traversing a closed path beginning and ending at any output of any of the four clocking elements and passing through a neighboring clocking element. In one embodiment of the present invention, each of the four clocking elements contains, a first node and a second node that are coupled together by a keeper circuit. Each clocking element also includes a first pair of inverters, each of which has an output coupled to the first node, and a second pair of inverters, each of which has an output coupled to the second node.