The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Sep. 18, 2001
Applicant:
Inventors:

Ichiro Yokomizo, Kyoto, JP;

Sachito Horiuchi, Kyoto, JP;

Mayuka Matsumae, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 ;
U.S. Cl.
CPC ...
G05F 1/10 ;
Abstract

A DC/DC converter is provided with a DC power source; a reference voltage generating circuit; an amplifier which receives an electric power from the DC power source and outputs an electric power of which voltage is controlled so as to assume a target voltage value by stepping down the voltage of the electric power from the DC power source depending on a difference between the reference voltage and a detection voltage; an oscillation circuit which generates signals having a specific frequency; a voltage boosting circuit which receives the output of the amplifier and the output of the oscillation circuit, causes switching of the output of the amplifier at the specific frequency to charge a first capacitor, and performs voltage boosting by transferring the electric charges-charged in the first capacitor through complementary ON/OFF switching with respect to the former switching into a second capacitor after raising substantially upto n/m time voltage (wherein n>m and n and m are integers equal to or more than 2) and charging the same therewith; and an output voltage detection circuit which generates the detection voltage depending on the output voltage of the boosting circuit, whereby a voltage of substantially n/m times of the target voltage value is generated from the voltage boosting circuit.


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