The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2002

Filed:

Sep. 05, 2001
Applicant:
Inventors:

Masanori Inamori, Tenri, JP;

Syouji Sakurai, Nara, JP;

Toshiya Fujiyama, Tenri, JP;

Hiroki Doi, Tenri, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 1/126 ;
U.S. Cl.
CPC ...
H03H 1/126 ;
Abstract

A delay circuit in accordance with the present invention includes: a first I L inverter and a second I L inverter connected in cascade with each other; and a capacitor interposed between a ground and a connecting point of the first and second inverters, wherein: the delay circuit further includes a current adjusting circuit having at least one third I L inverter with a plurality of output terminals at least one of which is connected to an input terminal of the third I L inverter; and the current adjusting circuit is connected to adjust a charge current of the capacitor. The configuration provides a delay circuit of simple circuit structure that accounts for a small area in an integrated circuit and that is capable of introducing any given delay and also provides a ring oscillator incorporating the delay circuit.


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