Method apparatus and system for managing virtual memory with virtual-physical mapping

Abstract

The present invention relates to a method, apparatus and system for managing virtual memory, in which a co-processor ( ) is adapted to use virtual memory with a host processor ( ). A host memory ( ) is coupled to the host processor ( ) to implement the virtual memory. The co-processor ( ) includes a virtual-physical memory mapping device ( ) for interrogating a virtual memory table and for mapping one or more virtual memory addresses ( ) requested by the co-processor ( ) into corresponding physical addresses ( ) in the host memory ( ). The virtual memory table is stored in two or more non-contiguously addressable regions of the host memory ( ), and is preferably a page table. The memory mapping device ( ) further includes a multiple-entry translation lookaside buffer ( ) for caching virtual-to-physical address mappings ( ), where entries in the buffer ( ) are replaced on a least recently used replacement basis. The memory mapping device ( ) also includes devices ( ) for comparing, replacing, singly invalidating and multiply invalidating one or more entries of the translation lookaside buffer ( ). It also includes a hashing device ( ) for, upon an occurrence of a miss in the translation lookaside buffer ( ), hashing a virtual memory address ( ) using a hash function to produce an index into the virtual memory table.