Prefetch buffer with continue detect

Abstract

A prefetch buffer architecture includes a prefetch buffer connected to a memory unit via a global bus. A continue detect unit is also connected to the global bus via a global bus interface. The continue detect unit examines prefetched data words for a predetermined bit pattern indicating the possible presence of a “continue” command. The continue detect unit may use one or more comparator circuits to compare each prefetched data word with the predetermined bit pattern. Multiple comparator circuits can be used in parallel to simultaneously examine multiple data words. When the continue detect unit determines that a data word contains the predetermined bit pattern, indicating the likely presence of a “continue” command, the prefetch operation is suspended. The data word likely to contain the “continue” command is stored in the prefetch buffer until it is called by a decode unit, which decodes the continue command. Once the continue command is decoded, the prefetching operations may resume by prefetching data at the appropriate data address, i.e., the “continue” address. The continue detect unit may also provide the “continue” address to a prefetch control unit so that the prefetching operation may be resumed at the proper “continue” address without waiting for the address to be decoded by the decoding unit.