The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2002

Filed:

Apr. 03, 2001
Applicant:
Inventor:

Brent Mulholland, Boulder, CO (US);

Assignee:

Maxtor Corporation, Longmont, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A multi-bank dynamic random access memory (DRAM) device is configured such that the bandwidth for performing data transfers is increased and the latency when performing the operations is decreased. The memory device when incorporated in a computer system may be configured such that data requests are received from one or more other devices in the system for data transfer functions. Further, through the interleaving of access to the multiple banks within the memory array, various set-up functions are performed on one bank while data transfer functions are performed on another bank, thus effectively hiding such functions.


Find Patent Forward Citations

Mulholland, Brent. (2002). Maximum bandwidth/minimum latency sdram interface (U.S. Patent No. 6392935). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6392935

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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