The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2002

Filed:

Aug. 10, 1998
Applicant:
Inventors:

Yasunobu Nakase, Tokyo, JP;

Tsutomu Yoshimura, Tokyo, JP;

Yoshikazu Morooka, Tokyo, JP;

Naoya Watanabe, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R 1/216 ;
U.S. Cl.
CPC ...
H01R 1/216 ;
Abstract

A circuit module includes a connector terminal ( A) provided on a front surface of a printed wiring board ( ) and connected to a data pin (DQ ) of a memory IC ( ) through an interconnect line ( ). A conductive connector terminal ( ) corresponds to the connector terminal ( ) and is provided on a back surface of the printed wiring board ( ). A through hole ( ) extends between part of the front surface of the printed wiring board ( ) where the connector terminal ( ) is formed and part of the back surface thereof where the conductive connector terminal ( ) is formed. A conductor fills the through hole ( ), thereby suppressing skews resulting from a difference in interconnect line length on the circuit module and decreasing a stub capacitance to achieve the reduction in power consumption.


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