The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2002

Filed:

Jul. 13, 2001
Applicant:
Inventor:

Chao-Ming Koh, Hsinchu Hsien, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18247 ;
U.S. Cl.
CPC ...
H01L 2/18247 ;
Abstract

A method of making a nonvolatile memory device having a high capacitive coupling ratio with a self-aligned floating gate is disclosed. A tunnel dielectric layer, a first conductive layer, and a sacrificial layer are sequentially formed over a semiconductor substrate. Isolation trenches are etched in the substrate through the layers and filled with isolation oxides that protrude over the substrate. Subsequently, the sacrificial layer is removed to leave a cavity between the isolation oxides. A second conductive layer is conformally deposited over substrate, and then planarized or etched back to the isolation oxides. Next, the isolation oxides are etched back to expose additional surface of the second conductive layer. Finally, an inter-gate dielectric layer and a control gate layer are sequentially formed over the substrate.


Find Patent Forward Citations

Loading…