The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2002

Filed:

Mar. 20, 2001
Applicant:
Inventors:

Yoshikazu Takeyama, Fujisawa, JP;

Takayuki Harima, Kawaguchi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

A semiconductor memory device according to the present invention includes a burst counter for sequentially automatically generating an address of a predetermined bit number in synchronism with a clock on the basis of a predetermined sequence in the subsequent operation cycle in accordance with the inputted initial address, and a plurality of memory cell sub-arrays which is formed by dividing a memory cell array. The semiconductor memory device further comprises a plurality of block decoder selection-time adjusting circuits for sequentially outputting a first block selecting signal, which is the base of a signal for selecting each of the memory cell sub-arrays, as a second block selecting signal at a timing corresponding to a read latency and for outputting the first block selecting signal as a third block selecting signal which has a length corresponding to the read latency.


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