Semiconductor memory that enables dimensional adjustment by using a fuse

Abstract

A new and improved semiconductor memory that facilitates machining of iterated circuits and solves the problems of the prior art such as the lengthy machining process, the compromised machining accuracy and the considerable time required for device evaluation is provided. A semiconductor memory is provided with a plurality of output circuits and a fuse circuit connected to each of the output circuits. The fuse circuit outputs output signals N and N to the individual output circuits, the signal levels of which are fixed to either H level or L level depending upon whether or not fuses f and f in the fuse circuit are disconnected. The output circuits are each provided with an output buffer circuit unit and a pre-driver circuit unit that drives the output buffer circuit unit. The driving capability of the pre-driver circuit unit is determined by the output signal from the fuse circuit. By providing the fuses that can be easily disconnected with a laser beam, it becomes possible to adjacent the gate widths of the pre-drivers at the plurality of output circuit units all at once. As a result, the length of machining time can be reduced compared to that required in the prior art technology.