The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2002

Filed:

Mar. 30, 2001
Applicant:
Inventor:

Hiroaki Nasu, Fujimi-machi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

By differentiating and using the signal that makes reference potential generation circuit become active (differentiating pulse generation block ), and by operating the reference potential generation circuit for a certain period of time, the current consumption can be reduced in proportion to the frequency when the operation frequency is low. Also, unstable operation during high speed operation of the memory is prevented by using the differentiating pulse generation block when the pulse width of an input signal is long, and by using a clock that is generated through an oscillator when the pulse width of the input signal is short.


Find Patent Forward Citations

Nasu, Hiroaki. (2002). Semiconductor integrated device and electronic apparatus mounted with the device (U.S. Patent No. 6388924). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6388924

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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