The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2002
Filed:
May. 10, 2001
Dong Myung Lee, Seoul, KR;
Jae Yoon Oh, Seoul, KR;
Dal Ho Cheong, Seoul, KR;
Soon Bae Yang, Seoul, KR;
LG Electronics Inc., Seoul, KR;
Abstract
Disclosed are a voltage compensating apparatus and method for a 3-phase inverter using four switches, to compensate for a severe distortion of a 3-phase application voltage due to a voltage ripple. The voltage compensating apparatus includes upper and lower DC link capacitors connected to each other in series and adapted to receive an input DC voltage, and to charge the DC voltage therein, a B inverter supplying a voltage to a 3-phase motor , using the four switches, when it receives the charged voltage from each of the DC link capacitors, a diodebridge receiving an AC voltage from an AC voltage source, rectifying the received AC voltage into a DC voltage, and applying the rectified DC voltage to the upper and lower DC link capacitors as the input DC voltage, and a triac coupled at an input terminal thereof to one line of the AC voltage source while being coupled at an output terminal thereof to a connection node between the upper and lower DC link capacitors, the triac serving to control whether or not the upper and lower DC link capacitors are to be charged with the DC voltage, respectively. In accordance with the present invention, the upper and lower DC link capacitors are charged through different paths, respectively. Accordingly, a control for DC link voltages is enabled to achieve a reduction in voltage ripple while minimizing a degradation in performance.