The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2002

Filed:

Sep. 24, 2001
Applicant:
Inventors:

Kenneth V. Buer, Gilbert, AZ (US);

Christopher D. Grondahl, Chandler, AZ (US);

Michael R. Lyons, Gilbert, AZ (US);

Assignee:

U.S. Monolithics, L.L.C., Chandler, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/68 ; H03F 3/195 ;
U.S. Cl.
CPC ...
H03F 3/68 ; H03F 3/195 ;
Abstract

A MMIC power amplifier having a smaller die size and higher power output are realized with the improved amplifier and transistor geometry herein provided. In particular, transistors, such as FETs (field effect transistors) are displaced from a conventional FET geometry with alternating FETs being rotated in opposite directions. The inputs (gate pads) and outputs (drain pads) of two adjacent FETs may be “shared.” In a shared input configuration, a compensation network may be coupled to the input. The improved FET configuration reduces the number of splitting and combining networks by up to 50% over the prior art and the die area for a typical 4 watt power amplifier is reduced by 48-72% over the prior art. The improved amplifier configuration provides a multi-sectional configuration wherein one section may be the mirrored image of another. In a two section amplifier, the amplifier appears to be “folded.”


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