The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2002
Filed:
Nov. 26, 1999
Eric S Fetzer, Longmont, CO (US);
Gary J Benjamin, Fort Collins, CO (US);
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
An a new dynamic logic entry latch or new “ELAT” and a method to capture a static input and convert it to a single rail dynamic signal with improved functionality and reduced clock and input load. The new ELAT utilizes a pulsed evaluate concept to enable more complex pull-down stack configurations and other improvements. The pulsed evaluate concept uses a pulse generators driven by the static input and a clock waveform to evaluate the static input and appropriately drive field effect transmitters on the pull-down stack. Utilizing multiple-input pulse generators or multiple pulse generators, the new ELAT can allow a wider variety of input functions and their inverses to be constructed without over-loading the pull-down stack.