The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2002
Filed:
Oct. 06, 1997
Thomas J. Swirbel, Davie, FL (US);
John K. Arledge, Ft. Lauderdale, FL (US);
Joaquin Barreto, Coral Springs, FL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A high density multi-layer printed circuit board ( ) is formed by building additional dielectric and metallization layers over a central core ( ) of conventional PCB laminate construction. The central core has a metallization pattern ( ) on at least one surface. A photoimaged dielectric layer ( ) is deposited on one side of the central core and overlies the metallization pattern. Vias ( ) are formed in this dielectric layer by a photoimaging process, and an additional metallization pattern ( ) on this layer is electrically connected to the underlying metallization pattern through these vias. A non-photoimageable dielectric layer ( ) is deposited on the other side of the central core. Vias ( ) are formed in this dielectric layer by a laser drilling process, and an additional metallization pattern ( ) on this layer is electrically connected to an underlying metallization pattern through these laser drilled vias.