The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2002
Filed:
Jan. 20, 1999
Applicant:
Inventors:
Subhas Bothra, San Jose, CA (US);
Rao Annapragada, San Jose, CA (US);
Assignee:
Philips Electronics No. America Corp., New York, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/1302 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/1302 ;
Abstract
A method of manufacturing semiconductors is provided which avoids metal deposition in voids formed in the dielectric between interconnects. In a preferred embodiment, an etch stop recess portion is provided over the dielectric which encloses the interconnects to prevent via openings from extending into the voids during the etching of the via openings. Accordingly, metal deposition of the voids during metal deposition of the vias is avoided. As a result, the semiconductors so formed has reduced capacitance between the interconnects and improved reliability since the voids are cleared of any metal deposition.