The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2002
Filed:
Dec. 04, 1998
Applicant:
Inventors:
Tsukasa Ooishi, Hyogo, JP;
Hiroaki Tanizaki, Hyogo, JP;
Shigeki Tomishima, Hyogo, JP;
Yutaka Komai, Ibaraki, JP;
Assignee:
Other;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract
A synchronous semiconductor memory device in a test mode of operation receives an external clock signal and is controlled by an internal clock adjustment circuit producing an internal clock signal of high frequency to provide write and read operations. A clock cycle converter circuit included in the internal clock adjustment circuit included in the internal clock adjustment circuit produces the internal clock signal by performing a hierarchical exclusive-OR operation on a specific pair of two of eight clock signals successively delayed in phase with respect to the external clock signal.