The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2002

Filed:

Mar. 30, 2001
Applicant:
Inventors:

Edward V. Bautista, Jr., Santa Clara, CA (US);

Kazuhiro Kurihara, Sunnyvale, CA (US);

Feng Pan, Richmond, CA (US);

Weng Fook Lee, Santa Clara, CA (US);

Ravi Sunkavalli, Milpitas, CA (US);

Darlene Hamilton, San Jose, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract

A system is provided for reducing band-to-band tunneling current during Flash memory erase operations. The system includes a memory sector divided into (N) I/O subsectors, N being an integer, and a drain pump to generate power for associated erase operations within the N I/O subsectors. An erase sequencing subsystem generates N pulses to enable the erase operations within each of the N I/O subsectors in order to reduce band-to-band tunneling current provided by the drain pump.


Find Patent Forward Citations

Bautista, Jr., Edward. (2002). I/o partitioning system and methodology to reduce band-to-band tunneling current during erase (U.S. Patent No. 6385093). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6385093

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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