The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2002
Filed:
Nov. 20, 2000
Satoru Tamada, Tokyo, JP;
Kei Maejima, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
To provide a semiconductor memory capable of executing a read test at a high speed based on a comparatively complicated test pattern without increasing a circuit area. Every fifth node N of a latch L of a sense latch group is connected to a gate of an NMOS transistor QLi (i=0 to 3) at 4 intervals and every fifth node N is connected to a gate of an NMOS transistor QRi at 4 intervals. The NMOS transistor QLi has a drain connected to a decision result line CHKiL and a source grounded. The NMOS transistor QRi has a drain connected to a decision result line CHKiR and a source grounded. An ALL deciding circuit A outputs, as a decision result ALL , decision result signals ALL L to ALL L obtained from decision result lines CHK L to CHK L and decision result signals ALL R to ALL R obtained from decision result lines CHK R to CHK R.