The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 07, 2002

Filed:

Mar. 15, 2001
Applicant:
Inventor:

Toru Shiomi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract

A semiconductor integrated circuit identifies and salvages defective memory cells producing a dc current error, such as a standby current fault, and thereby improves semiconductor chip yield. During the wafer test stage of the manufacturing process, a positive and negative supply voltage are both applied to the two inverter circuits of the SRAM memory cell to detect defective memory cells where a microshort occurs. The fuse inserted the supply line of the detected defective memory cell is then broken to interrupt applying a positive or negative supply voltage to the defective memory cell, and a redundant memory cell provided in the memory cell array is substituted for the defective memory cell.


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