The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2002
Filed:
Apr. 10, 2000
Applicant:
Inventors:
Fujio Takeda, Austin, TX (US);
James W. Miller, Austin, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/22 ;
U.S. Cl.
CPC ...
H02H 3/22 ;
Abstract
An ESD protection circuit ( ) coupled to each of a plurality of I/O circuits ( ) of an integrated circuit ( ) is disclosed. The ESD protection circuit includes a MOSFET transistor ( ) to provide primary ESD protection on occurrence of an ESD event. In one embodiment, the control electrode of the MOSFET transistor is coupled to a first buffer circuit ( ). Integrated circuit ( ) includes a remote trigger circuit ( ) coupled to the ESD protection circuits via a trigger bus ( ). The individual ESD protection circuits operate in parallel to provide ESD protection to the I/O circuits ( and ) upon occurrence of an ESD event.