Fabrication method of integrated circuits with multiple low dielectric-constant intermetal dielectrics

Abstract

The invention provides process for producing microelectronic devices such as integrated circuit devices. Such have vias, interconnect metallization and wiring lines using dissimilar low dielectric constant intermetal dielectrics. The use of both organic and inorganic low-k dielectrics offers advantages due to the significantly different plasma etch characteristics of the two kinds of dielectrics. One dielectric serves as the etchstop in etching the other dielectric so that no additional etchstop layer is required. A microelectronic device is formed having a substrate and a layer of a first dielectric material positioned on the substrate. A layer of a second dielectric material is positioned on the first dielectric layer. Either a sacrificial metal layer or and an additional layer the first dielectric material is positioned on the second dielectric material. At least one via extends through the first dielectric material layer and at least one trench extends through the additional layer of the first dielectric material and the second dielectric material layer to the via. A lining of a barrier metal is formed on inside walls and a floor of the trench and on inside walls and a floor the via. A fill metal fills the trench and via in contact with the lining of the barrier metal.