The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2002

Filed:

May. 10, 2000
Applicant:
Inventor:

Steven D. Curtin, Freehold, NJ (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

A copying logic block for, and a method of, programming an FPGA and a modular music synthesis processor incorporating the copying logic block or the method. In one embodiment, the copying logic block includes: (1) a block receiver that receives an instantiable logic block via a programming port of the FPGA and (2) a block instantiator, coupled to the block receiver, that creates multiple instantiations of the instantiable logic block within the FPGA in response to a command received via the programming port without requiring each of the multiple instantiations to enter the FPGA via the programming port.


Find Patent Forward Citations

Curtin, Steven. (2002). System and method for instantiating logic blocks within an fpga (U.S. Patent No. 6381733). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6381733

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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