The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2002
Filed:
Sep. 21, 1999
Hiroyuki Yoshida, Machida, JP;
Toshiyuki Nagata, Tokyo, JP;
Atsushi Satoh, Nakakoma-gun, JP;
Shuzoh Shiosaki, Tsuchiura, JP;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A memory cell array ( ) is disclosed having variable pitch word lines and bit lines. The word lines include central word lines ( ) having a first pitch, and peripheral word lines ( ), situated proximate to the edge of the array ( ), having a second pitch that is greater than the first pitch. In a similar fashion, the bit lines include central bit lines ( ) having a third pitch, and peripheral bit lines ( ), situated proximate to the edge of the array ( ), having a fourth pitch that is greater than the third pitch. The increase in word line and bit line pitch can reduce the adverse results of proximity effects caused by the junction of the dense array features with the relatively open features of the adjacent periphery circuits.