The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2002

Filed:

Dec. 22, 1998
Applicant:
Inventors:

Hiroto Yoshinuma, Tokyo-To, JP;

Kenzaburo Kawai, Tokyo-To, JP;

Shinichi Kobayashi, Tokyo-To, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/36 ;
U.S. Cl.
CPC ...
H05K 3/36 ;
Abstract

A multi-layer printed-wiring board including a substrate having a plurality of wiring pattern layers sequentially transferred thereon, each wiring pattern layer containing an electrically conductive layer and an electrically insulating layer. The wiring pattern layers are attached to the substrate through an electrically insulating layer.


Find Patent Forward Citations

Yoshinuma, Hiroto. (2002). Multi-layer printed-wiring board process for producing (U.S. Patent No. 6378199). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6378199

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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