The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2002

Filed:

Sep. 26, 1997
Applicant:
Inventors:

Tracy C. Denk, Highlands, NJ (US);

Patrik Larsson, Matawan, NJ (US);

Christopher John Nicol, Red Bank, NJ (US);

Assignee:

Agere Systems Guardian Corp., Orlando, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H 7/30 ;
U.S. Cl.
CPC ...
H03H 7/30 ;
Abstract

Multiported register files are employed to implement the input delays necessary for finite impulse response (FIR) filter operation. A multiported register file is a memory, typically small, with at least one read port and one write port. Data written into the multiported register file may be read out therefrom in any desired order. The multiported register tile may have additional output ports from which the data stored therein may be read out, also in any desired order, and independent from the order of any other output port. At least one output of each multiported register file is coupled to the input of the next stage of the FIR filter, if any. In addition, each multiported register file feeds data from one output to the multiply-add portion of its associated stage of the FIR filter. When the introduction of at least one sample delay for a particular sample is necessary, the multiported register file storing that sample is operated to supply, as an output, data that was previously stored therein, regardless of any data currently being supplied to it as input. In contrast, when no sample delay is required for a particular sample to reach a particular multiported register file, the multiported register files in the path of that sample are operated in a lookthrough mode. The read and write addresses, as well as the write enable signals for each multiported register file may be supplied in a pipelined manner.


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