The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2002

Filed:

Dec. 04, 2000
Applicant:
Inventor:

Antonin Rozsypal, Hutisko-Solanec, CZ;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/7687 ; H03K 1/9003 ;
U.S. Cl.
CPC ...
H03K 1/7687 ; H03K 1/9003 ;
Abstract

A maximum voltage bias control circuit ( ) is provided which accepts two supply voltages (V and V ) and determines the maximum voltage. The maximum voltage is then applied to terminal (V ) with current drivers ( ) used to provide additional current drive to terminal (V ). PMOS transistors ( ) are used to provide proper N-Well bias control of PMOS transistors ( and ).


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