Method for correcting single bit hard errors

Abstract

Disclosed is a solid state disk emulator system for significantly improving access time, i.e., improving both the seek time and the rotational latency. An error correction process is incorporated in the disk emulator which corrects single bit hard memory errors using only a single parity bit. The error correction process corrects single bit hard errors in a stored digital data word of “n” bits according to the following steps. The process generates a parity bit for the n-bit word according to a predetermined algorithm prior to storing the word. The process then stores the digital data word in a selected storage location and also stores the parity bit. The process retrieves the stored n-bit word from the selected storage location. The process also retrieves the stored parity bit for the n-bit word. Then, the process generates a new parity bit for the retrieved word according to the predetermined algorithm. The new parity bit is compared with the retrieved parity bit. The process corrects the n-bit retrieved word only when the parity bits are different, by inverting the retrieved word and writing the inverted word to the selected storage location. The process retrieves the inverted word from the selected storage location and inverts the inverted word retrieved from the selected storage location.