The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2002

Filed:

Oct. 17, 2000
Applicant:
Inventors:

Naohiko Irie, Santa Clara, CA (US);

Tony Lee Werner, Santa Clara, CA (US);

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 ;
U.S. Cl.
CPC ...
G06F 9/38 ;
Abstract

An improved preload/prefetching architecture is disclosed for controlling branch target instruction loading in a pipelined processor. Branch target instructions can be speculatively preloaded/prefetched based on a first prediction indicator provided in a branch control instruction, and they also can be actually loaded/fetched based on a second prediction indicator provided in a branch instruction. This mechanism results in reduced cache latency during program execution. The preloading/prefetching of branch target instructions can also be prioritized under software control to optimize instruction execution, based on particular indicators specified for branch target instructions within a branch hint buffer.


Find Patent Forward Citations

Irie, Naohiko. (2002). Prioritized pre-fetch/preload mechanism for loading and speculative preloading of candidate branch target instruction (U.S. Patent No. 6374348). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6374348

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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