The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2002

Filed:

Aug. 09, 2000
Applicant:
Inventor:

Robert D. Morrison, Star, ID (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B41J 2/435 ;
U.S. Cl.
CPC ...
B41J 2/435 ;
Abstract

A variable resolution transition placement circuit in an electrophotographic imaging device allows transitions to be placed within a stream of video data so that the pixel resolution achieved over a scan line is adjustable on a pixel by pixel basis using a system clock. Pixel data defines transition positions relative to a synthesized video clock defining pixel time periods. A converter converts positions of the transitions relative to the synthesized video clock to positions relative to the system clock using a value provided by a synthesized video clock to system clock transform generator. The value can change between synthesized video clock cycles to change the pixel resolution. A synthesized video generator generates values of a synthesized video clock relative to the system clock. Offset values generated from values of the synthesized video clock, the positions of the transitions relative to the system clock, and phase difference values from a phase measuring device are combined to determine the positions at which the transitions will be generated relative to the system clock. The values representing the positions at which the transitions will be generated are stored in a transition queue. The integer portions of these values are decremented on each system clock cycle. When the integer portions of these values reach zero, the fractional portion of these values (representing the position of transitions within system clock clock cycles) are provided to transition generation logic to generate transitions at the specified positions in system clock cycles.


Find Patent Forward Citations

Loading…