High-value integrated circuit resistor

Abstract

In its broadest terms, the invention is an electrostatically shielded and resistively insulated high-value resistor that is implemented using a CMOS resistive sealing layer of a larger CMOS device. In particular, the IC resistor according to the invention uses a substantially continuous, resistive layer to electrically connect the resistor input and output electrodes, which are formed as portions of a top metal layer. The resistive layer itself forms a resistive electrical path between the input and output, isolation of the resistor from other components on the same integrated circuit being provided without patterning of the resistive layer. An output ring portion of the top metal layer is electrically connected to the output electrode and surrounds the input electrode. A grounded shield ring portion of the top metal layer is also preferably included. The shield ring surrounds the output ring portion and forms a first electrostatic shield for the resistor. The input and output electrodes are preferably connected to external circuitry by stacked vias that extend down to a lower metal layer, portions of which form input and output leads to external circuitry. A grounded intermediate metal layer is then preferably also included. This intermediate layer extends between the input connection and the output ring portion to form a second electrostatic shield between the input connection and the output ring portion. The invention also encompasses an integrated circuit (IC) amplifier that has the IC resistor in a feedback path.