The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

May. 27, 1999
Applicant:
Inventors:

Masayuki Hayashi, Sunnyvale, CA (US);

Richard F. Keil, Jonesville, VT (US);

Robert J. Savaglio, Jericho, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B06F 1/750 ;
U.S. Cl.
CPC ...
B06F 1/750 ;
Abstract

A process sort test circuit and methodology for determining performance characteristic of an IC chip. The circuit is located on an IC chip itself and comprises an input for receiving an input signal; a first path from the input to a first output for transmitting the input signal to the first output, the first path sensitive to variations in a manufacturing process for the IC chip; a second path from the input to a second output for transmitting the input signal to the second output, the second path being substantially less sensitive to the variations in the manufacturing process for the IC chip; and, a pulse generator device coupled to the first and second outputs for detecting a difference in arrival times of the input signal at the first and second outputs and for outputting a sort signal if the difference is of a preselected magnitude. The sort signal enables output indication of a performance characteristic of the IC chip.


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