The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Dec. 19, 2000
Applicant:
Inventors:

Thomas R. Wik, Livermore, CA (US);

Ghasi R. Agrawal, San Jose, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

The present invention is directed to a system and method of compensating for coupling capacitance between bit lines in multi-port memories. The complementary bit lines are switched between a core cell and a modified core cell. The modified core cell may invert the connections to the access transistors. This results in the writing of data into the cell correctly while compensating for coupling capacitance.


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