The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Aug. 15, 2000
Applicant:
Inventor:

Hiroshi Kanno, Miyagi, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 ;
U.S. Cl.
CPC ...
H03L 7/06 ;
Abstract

A PLL circuit can reduce possibility of occurrence of data error even with a high speed data and reduces influence of noise, due to external disturbance or the like. The PLL circuit includes phase difference detecting means for detecting a phase difference of an output signal in relation to an input signal, oscillating means for outputting an output signal having a repetition frequency corresponding to a voltage level of a phase difference signal representative of the phase difference detected by the phase difference detecting means, and control means active when phase advanced condition or phase retarded condition of the output signal relative to the input signal is continued, for control a voltage level of the frequency difference signal depending upon number of times where phase advanced condition or phase retarded condition of the output signal relative to the input signal is continued.


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