The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2002

Filed:

Sep. 27, 2000
Applicant:
Inventors:

Russell J. Houghton, Essex Junction, VT (US);

William R. Tonti, Essex Junction, VT (US);

Thomas Vogelsang, Jericho, VT (US);

Adam B. Wilson, Colchester, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/923 ;
U.S. Cl.
CPC ...
H03K 1/923 ;
Abstract

A logic circuit implementing a logic function and method of manufacture thereof. The logic circuit includes a series connection of two or more CMOS devices, at least one CMOS device having a threshold voltage at an input lower than a threshold voltage at an input of another of the CMOS devices. The CMOS logic circuit exhibits enhanced switching speed for logic operations and reduced leakage current when operating in an off-state. A logic family is built around the series connection of two or more devices having mixed voltage threshold inputs for enhanced switching speed and reduced off-current leakage.


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